Semiconductor Engineering

Balancing Training, Quantization, And Hardware Integration In NPUs

Evolving challenges and strategies in AI/ML model deployment and hardware optimization have a big impact on NPU architectures ...
Semiconductor Engineering

MFMIS FeTFETs For Energy-Efficient, Scalable CIM Hardware Accelerators (Seoul National University)

A new technical titled “Impact of Random Phase Distribution on Ferroelectric Tunnel Field-Effect Transistors With Mitigation Strategies for Compute-in-Memory Applications” was published by researchers ...
Semiconductor Engineering

Software-Defined Systems

Russell Klein, program director for Siemens EDA’s High-Level Synthesis Division, talks with Semiconductor Engineering about ...
Semiconductor Engineering

Hypergraph-based Techniques To Map Spiking Neural Networks on Neuromorphic HW (Politecnico di Milano)

A new technical paper titled “A Case for Hypergraphs to Model and Map SNNs on Neuromorphic Hardware” was published by ...
Semiconductor Engineering

Overview of ALD-Driven Oxide Semiconductors for High Density, Low Power Memory Architectures (imec, Hanyang Univ.)

A new technical paper titled “Oxide Semiconductor for Advanced Memory Architectures: Atomic Layer Deposition, Key Requirement ...
Semiconductor Engineering

Outlier-aware Quantization Framework Co-designed With Heterogeneous NVM For SLM Deployment on Edge Platforms (UCSD et al.)

Efficient SLM Edge Inference via Outlier-Aware Quantization and Emergent Memories Co-Design” was published by researchers at ...
Semiconductor Engineering

Better Contact Resistance in Top-Gate CNFETs through Self-Aligned MoOx Nanoparticle Contact Doping (NYCU et al.)

A new technical paper titled “Improving Contact Resistance in Top-Gate Carbon Nanotube Transistor through Self-Aligned MoOx ...
Semiconductor Engineering

Confidentiality-preserving Framework For Secure On-Chip Communication in NoC Architectures

A new technical paper, “Secure Multi-Path Routing with All-or-Nothing Transform for Network-on-Chip Architectures,” was ...
Semiconductor Engineering

Overview and Comparison of Devices Used For Optical Waveguide-to-Waveguide Coupling (MIT et al.)

A new technical paper titled “Advances in waveguide to waveguide couplers for 3D integrated photonic packaging” was published ...
Semiconductor Engineering

Addressing Critical Tradeoffs In NPU Design

AI/ML are driving a steep ramp in neural processing unit (NPU) design activity for everything from data centers to edge ...
Semiconductor Engineering

Every Atom Now Counts In Advanced Chip Manufacturing

How atomic-layer deposition and hybrid dielectrics are redefining reliability and scaling for AI-era semiconductors.
Semiconductor Engineering

A Verification Framework For Trojan Detection (U. of Kansas, U. of Florida)

Trojan Detection in COTS Hardware via Statistical Activation of Microarchitectural Events” was published by researchers at ...